24C1024 DATASHEET PDF

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The device address word con- sists of a mandatory one, zero sequence for the first five most significant bits as shown. The K uses the one device address bit, A1, to allow up to two devices on the same bus. The A1 bit must compare to the corresponding hardwired input pin.

The A1 pin uses an inter- nal proprietary circuit that biases it to a logic low condition if the pin is allowed to float. The seventh bit P 0 of the device address is a memory page address bit. This memory page address bit is the most significant bit of the data word address that follows. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. If a compare is not made, the device will return to a standby state.

The word address field consists of the P0 bit of the device address, then the most significant word address followed by the least significant word address refer to Figure 2 A write operation requires the P0 bit and two 8-bit data word addresses following the device address word and acknowledgment. The addressing device, such as a microcontroller, then must terminate the write sequence with a stop condition.

A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in.

Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to more data words. The microcontroller must ter- minate the page write sequence with a stop condition refer to Figure 3. The data word address lower 8 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location.

When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. This involves sending a start condition followed by the device address word. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. Html Pages.

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24C1024 ATMEL [ATMEL Corporation], 24C1024 Datasheet

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24C1024 DATASHEET PDF

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